The present invention relates to semiconductor packages and fabrication methods thereof, and more particularly, to a BGA (ball grid array) package with enhanced electrical and thermal performance, and a method for fabricating the BGA package.
BGA (ball grid array) is an advanced type of semiconductor packaging technology, which is characterized by the use of a substrate as a chip carrier whose front surface is used for mounting one or more semiconductor chips and whose back surface is provided with a plurality of array-arranged solder balls. During a SMT (surface mount technology) process, a BGA package can be mechanically bonded and electrically coupled to an external device such as a printed circuit board (PCB) by means of these solder balls.
Patents related to BGA technology include, for example, U.S. Pat. No. 5,851,337 entitled xe2x80x9cMETHOD OF CONNECTING TEHS ON PBGA AND MODIFIED CONNECTING STRUCTURExe2x80x9d. This patent is characterized by the use of a ground circuit for connecting a heat spreader to a substrate to help enhance grounding effect of a BGA package. One drawback to this patent, however, is that it is unsuitably used for packaging semiconductor chips having a great number of power and ground pads.
A conventional solution to the foregoing problem is depicted with reference to FIGS. 1A and 1B. As shown, an exemplified BGA package comprises: a substrate 100, at least a semiconductor chip 110, a power-connecting heat spreader 120, a ground-connecting heat spreader 130, a plurality of sets of bonding wires 141, 142, 143, an encapsulation body 150, and a plurality of array-arranged solder balls 160.
The substrate 100 has a front surface 100a and a back surface 100b, and is formed with a plurality of electrically-conductive vias 101a, 101b, 101c at predetermined positions, including power vias 101a, ground vias 101b and I/O (input/output) vias 101c, which are adapted to penetrate through the substrate 100.
The semiconductor chip 110 has an active surface 110a and an inactive surface 110b. The active surface 110a is formed with a plurality of bond pads 111a, 111b, 111c, including power pads 111a, ground pads 111b and I/O pads 111e. This active surface 110a of the semiconductor chip 110 is further formed with a power plane 112a and a ground plane 112b, wherein the power plane 112a is electrically connected to the power pads 111a by a first set of bonding wires 141, and the ground plane 112b is electrically connected to the ground pads 111b by a second set of bonding wires 142. Further, the I/O pads 111c are electrically connected by a third set of bonding wires 143 to the I/O vias 101c on the front surface 100a of the substrate 100.
The power-connecting heat spreader 120 is integrally formed by a support portion 121, an overhead portion 122 and a downward-extending portion 123. The power-connecting heat spreader 120 is mounted over the substrate 100 to partly cover the semiconductor chip 110, wherein the support portion 121 is electrically bonded to the power vias 101a of the substrate 100, and the downward-extending portion 123 is electrically bonded to the power plane 112a on the semiconductor chip 110, allowing the overhead portion 122 to be elevated in position above the semiconductor chip 110 by the support portion 121 and the downward-extending portion 123. The power-connecting heat spreader 120 is used to connect power to the semiconductor chip 110, and to dissipate heat generated by the semiconductor chip 110 during operation.
Similarly, the ground-connecting heat spreader 130 is composed of a support portion 131, an overhead portion 132 and a downward-extending portion 133. The ground-connecting heat spreader 130 is mounted over the substrate 100 to partly cover the semiconductor chip 110, wherein the support portion 131 is electrically bonded to the ground vias 101b of the substrate 100, and the downward-extending portion 133 is electrically bonded to the ground plane 112b on the semiconductor chip 110, allowing the overhead portion 132 to be elevated in position above the semiconductor chip 110 by the support portion 131 and the downward-extending portion 133. The ground-connecting heat spreader 130 is used to connect the semiconductor chip 110 to ground, and to dissipate heat generated by the semiconductor chip 110 during operation.
The encapsulation body 150 is formed to encapsulate the front surface 100a of the substrate 100, the semiconductor chip 110, the power-connecting heat spreader 120, and the ground-connecting heat spreader 130. In view of power transmission and grounding purposes, the power-connecting heat spreader 120 and the ground-connecting heat spreader 130 are preferably not exposed to outside of the encapsulation body 150.
The array-arranged solder balls 160 are implanted on the back surface 100b of the substrate 100, including a plurality of power balls 161 electrically connected to the power vias 101a, a plurality of ground balls 162 electrically connected to the ground vias 101b, and a plurality of I/O balls 163 electrically connected to the I/O vias 101c. 
By the above structure as illustrated in FIG. 1A, power can be externally supplied to the semiconductor chip 110 successively via the power balls 161, the power vias 101a, the power-connecting heat spreader 120, the power plane 112a, the bonding wires 141, and the power pads 111a. Moreover, the semiconductor chip 110 can be connected to ground successively via the ground pads 111b, the bonding wires 142, the ground plane 112b, the ground-connecting heat spreader 130, the ground vias 101b, and the ground balls 162. Further, the semiconductor chip 110 can transfer I/O signals via the I/O pads 111c, the bonding wires 143, the I/O vias 101e, and the I/O balls 163.
One drawback to the forgoing BGA package, however, is that, since the ground-connecting heat spreader 130 only covers part of the semiconductor chip 110, it would not be able to provide good EMI (electromagnetic interference) shielding effect for the semiconductor chip 110 during operation.
Moreover, since both the power-connecting heat spreader 120 and the ground-connecting heat spreader 130 are completely enclosed by the encapsulation body 150, they may not provide satisfactory heat-dissipation efficiency for the packaged semiconductor chip 110.
An objective of this invention is to provide a semiconductor package with enhanced electrical and thermal performance, which provides good EMI (electromagnetic interference) shielding effect.
Another objective of this invention is to provide a semiconductor package with enhanced electrical and thermal performance, by which satisfactory heat-dissipation efficiency is achieved.
A further objective of this invention is to provide a semiconductor package with enhanced electrical and thermal performance, wherein the semiconductor package is cost-effectively fabricated.
In accordance with the above and other objectives, the present invention proposes a BGA semiconductor package and a method for fabricating the same.
The BGA semiconductor package of the invention comprises: a substrate having a front surface and a back surface opposed to the front surface; at least a chip having an active surface and an inactive surface opposed to the active surface, wherein the active surface is formed with a power plane and a ground plane, and the inactive surface is mounted on the front surface of the substrate; a power-connecting heat spreader adapted to entirely cover the chip, and electrically bonded to the front surface of the substrate and the power plane on the chip; a ground-connecting heat spreader positioned in elevation above the power-connecting heat spreader, and adapted to be electrically bonded to the front surface of the substrate and the ground plane on the chip; an encapsulation body for encapsulating the front surface of the substrate, the chip, the power-connecting heat spreader and the ground-connecting heat spreader; and a plurality of solder balls implanted on the back surface of the substrate.
The above package structure is characterized by the use of a specially-designed set of power-connecting heat spreader and ground-connecting heat spreader, which are each electrically connected to and structured to entirely cover an underlying chip. Thereby, the power-connecting heat spreader allows external power to be efficiently supplied to the chip, and the ground-connecting heat spreader would provide good EMI shielding effect for allowing the chip to improve its electrical performance during operation. Further, a top surface of the ground-connecting heat spreader is adapted to be exposed to outside of an encapsulation body that encapsulates the chip, thereby helping enhancing heat-dissipation efficiency for the package structure.